This invention relates in general to tag extensions for microprocessors, and more particularly, to the tag extension of a reduced instruction set computer (RISC) architecture for enhancing symbolic and numeric processing while maintaining backward compatibility without degrading execution performance.
Traditionally, RISC architectures have been viewed as unsuitable for symbolic processing languages such as Prolog, Scheme and Lisp. Programs written in Prolog, for example, comprise a sequence of procedural calls which greatly simplify the programming effort by separating the logic and control elements of the algorithms. A Prolog programmer may specify the high level logic of the problem and allow the compiler to define the control strategy to generate the executable code. Many of the compilers today convert the Prolog source code into Warren Abstract Machine (WAM) instructions which may then be executed on a conventional complex instruction set computer (CISC), such as the Motorola MC68030 microprocessor. However, symbolic languages tend to execute slowly on CISC machines due, in part, to the requirement that a data type must be assigned to the data words at run time rather than at compilation time, as is true for most non-symbolic languages such as Fortran, Pascal and C. A data type identifies the data word as an integer, floating point number, variable, list, etc.
For most if not all fifth generation languages such as Prolog, at least three bits are needed to support dynamic data type checking and related computations. Unfortunately, the typical 32-bit CISC architecture has no dedicated resource to handle the type tags of the data words. Consequently, for these machines to execute Prolog code, a 3-bit portion of the internal registers is reserved for the type designators leaving the remaining portion, say 29 bits of a 32-bit register, for storage of the integers and floating point number. This reduces the addressing range and the resolution of the data words. In order to regain the full 32-bit precision, the Prolog compiler must establish one register containing the data type tag as an indirect pointer to another register or memory location of the actual 32-bits of data. Since such full 32-bit operations occur frequently, the indirect pointers are inefficient and slow the execution speed of the microprocessor.
More recently, the RISC architecture has been considered for improving the symbolic and numeric processing of the Prolog language. The motivation in this direction is influenced by the simpler, more powerful instruction set offered by the RISC processor. Moreover, some RISC microprocessors such as Motorola's MC88100 include an on-board floating point unit which can enhance the otherwise poor numerical performance of the Prolog language. However, most if not all RISC microprocessors, including the MC88100, are fixed 32-bit machines and, therefore, must also allocate a portion of the internal registers for the data type tags when executing symbolic languages. Thus, the RISC microprocessor suffers from the same problem as the CISC counterpart in the inefficient handling of data type tags, yet it is still desirable to use the RISC machine for the reasons advanced above.
Hence, what is needed is an improved RISC microprocessor architecture which provides a dedicated resource for handling data type tags and includes an extended instruction set for effectively exploiting such a resource.